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The various avatars of the Hall effect

In this second article of Ed Publica’s series on the Hall effect, Dr. Saraubh Basu examines the physics of the Hall effect variants discovered over the course of the past century.

Dr. Saurabh Basu

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Wikimedia Xenon hall thruster
A xenon Hall thruster tested at a NASA facility. Credit: NASA/JPL-Caltech

This is the second article of Ed Publica’s series on the Hall effect, which covers the various manifestations of the Hall effect. You can read the first article here.

The ‘anomalous’ Hall effect

In 1881, just two years after Edwin Hall discovered the eponymous Hall effect, he spotted an anomaly when replicating the effect with ferromagnets.

He had observed a tenfold deflection of electric charges this time around, compared to non-magnetic conductors.

Suspecting the magnetic properties played a role, this avatar of the Hall effect is dubbed the anomalous Hall effect. The word ‘anomalous’ is used owing to the fact that external magnetic field no longer remains as a stringent requirement for the Hall effect; instead, the intrinsic magnetization (for instance, the ferromagnet in the above example) fulfils that criterion.

Wikimedia edwin hall 1

The physicist Edwin Hall. Credit: Wikimedia

The Hall resistivity in ferromagnets increase steeply under the presence of very weak magnetic fields. However, in stronger magnetic fields, the Hall resistivity doesn’t increase further very much. This saturation is rather strange, for it is in contrast to the classical Hall effect where the Hall resistivity maintains its steady growth.

There are several other effects that play a crucial role in determining the anomalous Hall resistivity, thus making it a complicated phenomenon that physicists lack comprehensive understanding about, in comparison to the various other avatars of the Hall effect.

Quantum avatar(s)

The fact that a simple lab experiment showed how the Hall resistivity can be expressed as an equation that contains merely constants, opened up a a plethora of research to understand the cause of this ‘universality’. For it hinted to the involvement of a very fundamental phenomenon.

In 1980, Klaus von Klitzing discovered the quantum avatar of the Hall effect was detected. He was amidst research at a magnetic facility in Grenoble, France, working to improve electron mobility in metal oxide semiconductor field effect transistors (MOSFET). These are transistors that typically operate at extremely low temperatures and under intense magnetic fields.

von Klitzing observed his sample’s Hall resistivity assuming discretized values. This means the resistivity jumps in steps, by a fixed amount that can be scaled as multiples of an integer number (includes 0 along with whole numbers such as 1,2,3, and so on). This discretization reveals the underlying quantum mechanical behavior that has been unraveled at long last – thus bearing its name – the integer quantum Hall effect. von Klitzing later won the Nobel Prize in Physics for 1985 for this work.

Wikimedia quantum hall effect

The plot here depicts the transverse and longitudinal Hall resistivity (y-axis) increasing in integer steps as the magnetic field (x-axis) increases. This is due to the integer quantum Hall effect. Credit: Wikimedia

But the quantization isn’t limited to integer multiples. In fact, two years later, the fractional quantum Hall effect was observed in experiments. It was shown there were about 100 fractions, including those that aren’t whole numbers that were now in the formula.

Robert Laughlin, who would later win a share of the 1998 Nobel Prize in Physics, proposed a theory to explain the observations. It boils down to the interaction among electrons, either due to the Coulombic repulsion force or the Pauli exclusion principle.

These interacts would eventually split the degeneracy of these enormously degenerate Landau energy levels. These are quantum states occupied by electrons that complete circular revolutions under the influence of an external magnetic field. Splitting these degeneracies, lead to the opening of an energy gap, for the fractional quantum Hall effect to be observed. 

‘Spin’ avatar(s)

Just as there are electric charges in nature, so are there spin currents found in nature. ‘Spin’ is a key property found in quantum particles. Unlike what the name suggests, these quantum particles don’t spin or rotate about any axis passing through them. However, these particles carry an angular momentum as though it does spin.

In 1971, before von Klitzing observed the quantum Hall effect, Mikhail Dyakonov and Vladimir Perel hypothesized the spin Hall effect.

In this avatar of the Hall effect, quantum spins of opposite kinds accumulate at the edges of the sample, orthogonal to the direction in which the charge current passes.

The spin selection can be facilitated by the spin-orbit coupling. This refers to the modified energy levels in an atom when the electron’s motion is under the influence on the magnetic field generated by the nucleus. Strong coupling may be intrinsic to doped semiconductors. The proposal has triggered intense investigation of the phenomenon, with first experimental observations of the spin Hall effect seen in n-doped semiconductors and two-dimensional hole gases.

Karthik quantum spin

Quantum spins don’t really look like the depiction above, which is meant to showcase a fact that particles like electrons do have an intrinsic angular momentum nonetheless. Credit: Karthik / Ed Publica

For more than a decade, studies concerning the spin current and its application to novel spintronics (or spin electronics) have received plethora of attention. This is with regard to efficiently generating, manipulating and detecting spin accumulation in a sample material. Some progress has also occurred from the device fabrication perspective via techniques such as spin injection, among others.

A major advantage in dealing with the spin current lies in the non-dissipative (or very less dissipation) nature which arises owing to the time reversal invariance of the spin current. This presents a non-dissipative scenario (unlike the dissipative effects seen with charged currents), thus making it quite advantageous for spin transport phenomena.  

Furthermore, a quantized version of the spin Hall effect exists, with mercury telluride and cadmium telluride quantum well superlattices, showcasing this effect. In 2005, a quantum treatment was proposed by Charles Kane and Eugene Mele, in the form of a tight binding toy model of electrons operating in a two-dimensional honeycomb lattice.

In fact, the ‘wonder material’ graphene, which is a two-dimensional honeycomb lattice constituting carbon atoms, does satisfy some key requirements for the quantum spin Hall effect. However, it lacks a large spin-orbit coupling among other requirements.  

Nonetheless, graphene’s ability to entertain the quantum spin Hall effect, makes it a prospective candidate to find applications in next-generation spintronic devices.

Dr. Saurabh Basu is Professor at Department of Physics, Indian Institute of Technology (IIT) Guwahati. He works in the area of correlated electron systems with the main focus on bosonic superfluidity in (optical) lattices.

Space & Physics

Skyroot: The Rise of Private Rockets in India’s Space Economy

Skyroot Aerospace has become the first Indian private company to place a rocket into orbit with the successful maiden flight of Vikram-1. Beyond a technological milestone, the mission signals India’s growing role in the global commercial space economy and the rise of private launch providers.

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Skyroot Aerospace's Vikram-1 rocket stands on the launch pad at the Satish Dhawan Space Centre ahead of its historic maiden mission, becoming the first Indian private rocket to reach orbit.
Skyroot Aerospace's Vikram-1 launch vehicle on the launch pad before its successful maiden mission from the Satish Dhawan Space Centre on July 18. The mission made Vikram-1 the first privately developed Indian rocket to reach orbit. Image credit: X/SkyrootA

India’s commercial space sector reached a new milestone on July 18 when Skyroot Aerospace successfully launched its Vikram-1 rocket into orbit, becoming the first Indian private company to do so. More than a technological achievement, the mission reflects the rapid evolution of India’s private space ecosystem—from supporting national missions to building and launching orbital rockets of its own.

The rocket lifted off from the Satish Dhawan Space Centre after a 35-minute delay caused by a technical issue detected during the final countdown. It followed its planned flight profile, with all three solid-fuel stages performing as expected before the Orbit Adjustment Module (OAM) completed the final burn, placing the mission into a 450-kilometre low Earth orbit about 15 minutes after launch.

Skyroot
Engineers carry out the final assembly and integration of Skyroot Aerospace’s Vikram-1 launch vehicle at the Satish Dhawan Space Centre before its successful maiden mission to orbit. Image credit: X/SkyrootA

A Maiden Mission That Delivered

The mission was named Aagaman, sanskrit word meaning “arrival”. The flight carried two CubeSats, one developed by Skyroot and another by Indian startup Grahaa Space. It also transported hosted payloads from Dcubed and Cosmoserve Space, along with commemorative items, including postcards signed by Prime Minister Narendra Modi.

Ahead of the launch, Skyroot co-founder and Chief Executive Officer Pawan Kumar Chandana described the mission as the company’s first real opportunity to validate years of engineering in flight. After the successful launch, he called it “a historic moment” for both Skyroot and India.

“Reaching orbit on the first attempt—I never thought it was possible, but the Skyroot team made it happen,” Chandana said.

A Milestone for India’s Space Sector

The launch is also a significant moment for India’s commercial space ambitions. Since opening the space sector to private participation, the government has introduced reforms, created IN-SPACe to promote and regulate private space activities, and expanded access to ISRO’s launch infrastructure.

Skyroot’s success is among the strongest indicators yet that those reforms are translating into operational capability. It also strengthens India’s position in the fast-growing global market for small satellite launches.

Demand for small satellite launches is rising worldwide, driven by Earth observation, climate monitoring, communications and defence. By becoming the first Indian private company to reach orbit, Skyroot joins a relatively small group of commercial launch providers globally, giving satellite operators another option in an increasingly competitive market. The achievement also reflects a broader shift in the global space industry, where private companies are taking on roles once reserved for national space agencies.

What Comes Next

Vikram-1 can carry payloads of up to 350 kilograms to low Earth orbit. Skyroot is developing Vikram-1U, an upgraded variant with strap-on boosters that will increase the payload capacity to 550 kilograms, and plans additional Vikram-1 launches before starting regular commercial operations.

The company recently raised $60 million to expand production and accelerate development of its next-generation Vikram-2 rocket.

With Vikram-1’s successful debut, India’s private space industry has crossed an important threshold—showing that homegrown startups are now capable of developing and launching orbital-class rockets, opening a new chapter in the country’s space journey.

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Space & Physics

From Assembly to Silicon: India’s Long Road to Semiconductor Self-Reliance

India is building a semiconductor ecosystem through fabrication, packaging, chip design and Mission 2.0 to reduce imports and strengthen technology leadership.

Joe Jacob

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What India Semiconductor Mission 2.0 Changes
Image credit; Miguel Á. Padriñán/Pexels

For decades, India excelled at writing the software that powered the world’s computers but remained almost entirely dependent on other countries for the chips inside them. Every smartphone, fighter aircraft, satellite, electric vehicle, telecom network and artificial intelligence system relied on semiconductors designed and manufactured largely outside India’s borders.

That dependence has become one of the country’s biggest strategic vulnerabilities.

Today, India is attempting to change that.

How the India Semiconductor Mission Began

What began as an industrial policy is steadily evolving into a national technology mission—one that seeks not merely to manufacture chips, but to build an ecosystem spanning design, fabrication, advanced packaging, materials, equipment and skilled talent. If successful, it could reshape India’s manufacturing landscape and strengthen its position in a global technology race increasingly defined by semiconductor capabilities.

The launch of the India Semiconductor Mission (ISM) marked a turning point. Rather than offering isolated incentives, the government adopted a mission-driven approach aimed at creating an end-to-end semiconductor ecosystem. The objective extends beyond attracting investment; it is about ensuring technological sovereignty in a world where access to chips increasingly determines economic resilience and national security.

The Design Linked Incentive (DLI) scheme has been an important catalyst. We are seeing some early success. At the same time, there is also an evolutionary factor at play. Engineers who moved abroad 20–25 years ago are now at a stage where they have both the experience and financial capacity to take entrepreneurial risks. Many also want to return to India–says Neelkanth Mishra, in an interview with EdPublica.

Why semiconductors matter

Semiconductors are often described as the “brains” of modern electronics, but their strategic significance runs far deeper.

Every sector that governments now classify as critical—artificial intelligence, defence, space, telecommunications, medical devices, automobiles, renewable energy and industrial automation—depends on increasingly sophisticated chips.

The COVID-19 pandemic exposed how vulnerable global supply chains had become. Factory shutdowns in one part of the world disrupted automobile production thousands of kilometres away. Geopolitical tensions further highlighted the risks of concentrating semiconductor manufacturing in only a handful of countries.

For India, which imports billions of dollars’ worth of electronic components every year, the lesson was unmistakable: technological ambition cannot rest entirely on imported hardware.

Building the foundation

Recognising this challenge, the government launched India Semiconductor Mission 1.0, backed by a financial incentive programme worth ₹76,000 crore. It represented India’s first coordinated attempt to build semiconductor manufacturing capabilities within the country.

The mission was designed to support multiple segments simultaneously:

>> silicon wafer fabrication plants;

>> assembly, testing, marking and packaging (ATMP) facilities;

>> Outsourced Semiconductor Assembly and Test (OSAT) units;

>> compound semiconductor manufacturing;

>> semiconductor design through the Design Linked Incentive (DLI) Scheme.

Rather than relying on a single mega-project, policymakers attempted to create an ecosystem in which manufacturing, design, packaging and supply chains could evolve together.

From policy announcements to factories

One of the biggest criticisms of India’s earlier electronics programmes was that announcements often outpaced execution.

This time, the picture is beginning to look different.

Approved semiconductor projects now represent cumulative investment commitments exceeding ₹1.64 lakh crore, spread across multiple states. According to the Ministry of Electronics and Information Technology, the approved portfolio now covers fabrication facilities, packaging plants and compound semiconductor manufacturing, reflecting a broader industrial base than initially envisioned.

The most visible milestone has been the commencement of commercial production at Micron Technology’s advanced semiconductor packaging facility in Gujarat, widely regarded as the first major operational success under the mission.

Several other large projects—including those led by Tata Electronics, Kaynes Semicon, and the Tata-PSMC semiconductor fabrication project at Dholera—have moved into advanced stages of construction and are expected to enter commercial production soon. Together, they represent India’s first serious attempt to establish domestic silicon manufacturing at scale.

Equally significant is the geographical spread.

Instead of concentrating semiconductor manufacturing in one industrial cluster, projects are now emerging across Gujarat, Rajasthan and other states, creating the beginnings of a distributed semiconductor manufacturing network.

Manufacturing is only one piece of the puzzle

Building chips requires far more than fabrication plants.

A modern semiconductor ecosystem depends on hundreds of specialised suppliers producing chemicals, gases, ultra-pure materials, precision equipment, packaging technologies and printed circuit boards (PCBs).

Recognising these gaps, the government has started extending policy support beyond chip fabrication.

A recent example is the foundation of advanced PCB manufacturing projects worth about ₹6,750 crore in Jewar, Uttar Pradesh. These facilities are expected to manufacture high-density multilayer PCBs—including advanced 20-22 layer boards—that India has traditionally imported in large quantities.

India Semiconductor Mission chip manufacturing facility
Image credit/Pok Rie / Pexels

Reducing imports of such critical components strengthens the broader electronics manufacturing ecosystem while creating domestic capabilities that extend well beyond semiconductor fabrication itself.

Design remains India’s strongest advantage

While fabrication receives most public attention, India already possesses one major strength: semiconductor design.

Thousands of engineers employed by global companies already design chips from Indian engineering centres. The challenge has been converting this design talent into domestic intellectual property.

The Design Linked Incentive (DLI) Scheme attempts to bridge that gap.

According to government data, the programme has supported dozens of chip design projects, enabled successful tape-outs, encouraged patent filings and provided advanced chip-design tools to more than 100 companies while training a growing pool of specialised semiconductor engineers.

Moving from outsourced engineering services towards Indian-owned semiconductor intellectual property could prove just as significant as establishing fabrication plants.

The next chapter: ISM 2.0

If the first phase focused on attracting semiconductor manufacturing, the next phase aims to deepen India’s role across the entire value chain.

Announced in the Union Budget 2026-27, India Semiconductor Mission 2.0 shifts attention towards areas where India still depends heavily on imports.

The new phase proposes support for:

>> semiconductor manufacturing equipment;

>> specialty materials and chemicals;

>> indigenous semiconductor intellectual property;

>> advanced packaging technologies;

>> compound semiconductors;

>> industry-led research and training centres.

The underlying philosophy is straightforward: long-term self-reliance cannot be achieved by importing all the machinery, chemicals and specialised materials required to manufacture chips.

Instead, India aims to build capabilities throughout the production chain—from research laboratories to finished semiconductor products.

Recent reports indicate that the government is also preparing a substantially larger financial commitment for ISM 2.0 as it expands beyond manufacturing incentives into ecosystem development.

Strategic partnerships without strategic dependence

India’s semiconductor strategy has deliberately combined domestic capability building with international collaboration.

Leading companies from the United States, Taiwan, Japan and South Korea have become partners in India’s emerging semiconductor ecosystem, bringing technology, manufacturing expertise and investment.

This reflects a broader policy shift.

Rather than attempting complete technological isolation, India is seeking trusted international partnerships while gradually strengthening indigenous capabilities in manufacturing, design and supply chains.

In an increasingly fragmented global technology landscape, diversification itself has become a strategic asset.

The road ahead remains difficult

Despite visible progress, India’s semiconductor journey is still in its early stages.

Chip fabrication demands extraordinary precision, massive capital investments, reliable infrastructure and uninterrupted supplies of ultra-pure water, electricity and specialised materials. Success also depends on building a workforce capable of operating some of the world’s most sophisticated manufacturing facilities.

Moreover, semiconductor manufacturing is measured in decades, not election cycles.

Countries that dominate the industry today invested consistently over many years before becoming global leaders.

India therefore faces the challenge of maintaining policy continuity while ensuring that announced projects translate into commercially competitive production.

A larger national ambition

The significance of India’s semiconductor mission extends well beyond electronics manufacturing.

Every fabrication facility commissioned, every packaging unit established and every design company supported reduces import dependence, creates highly skilled employment and strengthens India’s position within global technology supply chains.

For a country seeking greater strategic autonomy, semiconductor capability is increasingly becoming as important as energy security or defence preparedness.

The first phase of the mission has established the initial building blocks. The second phase aims to strengthen the ecosystem beneath them.

Whether India ultimately becomes a major global semiconductor hub will depend not on a single factory or policy announcement, but on its ability to sustain investment, develop talent, encourage innovation and build an integrated value chain over the coming decade.

After years of watching the global semiconductor revolution from the sidelines, India has entered the race. The challenge now is to ensure that today’s investment commitments become tomorrow’s manufacturing capability—and eventually, technological leadership.

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MIT develops ultra-low-power chip that could help tiny robots navigate complex environments

MIT researchers have developed an ultra-low-power chip that enables tiny robots to create detailed 3D maps and navigate complex environments while consuming just 6 milliwatts of power. This breakthrough could expand the capabilities of drones, inspection robots, and augmented reality devices.

Joe Jacob

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MIT robot
Image: Zamani Sahudi/Pexels

Researchers at the Massachusetts Institute of Technology (MIT) have developed a new ultra-efficient chip that enables tiny autonomous robots to generate detailed 3D maps of their surroundings in real time while consuming only a fraction of the power required by existing systems.

The new MIT robot navigation chip, called Gleanmer, could help small drones and robots safely navigate complex environments, from industrial heating and ventilation systems to confined inspection spaces where battery life and computing resources are limited.

According to the researchers, the chip consumes just 6 milliwatts of power—roughly the same amount needed to run a single LED—while constructing detailed 3D maps for navigation.

The findings were recently presented at the IEEE Very Large-Scale Integrated Circuits Symposium.

Designed for battery-powered robots

Autonomous robots rely on 3D maps to understand their surroundings and avoid obstacles. However, generating these maps typically requires significant computing power and memory, making the process difficult for small, battery-powered devices.

The MIT team tackled this challenge by combining a highly efficient mapping algorithm with custom-designed hardware that minimizes memory usage and energy consumption.

“This paper showcases a key example of how you can leverage co-design of the algorithm and hardware to really push energy efficiency,” Vivienne Sze, professor in MIT’s Department of Electrical Engineering and Computer Science and senior author of the study, said in a media statement.

“While there has been a lot of work looking into compact 3D maps, what stands out about this work is that it also ensures that the process to generate those maps is as efficient as possible. Our chip allows you to store very large maps in a very small space, and do it in a very energy efficient manner,” she added.

Replacing cubes with ‘Gaussian blobs’

Traditional mapping systems represent environments using millions of cube-shaped units known as voxels. These structures require substantial memory and processing power.

Instead, the MIT researchers employed a technique that represents objects using flexible ellipsoid-shaped structures known as Gaussians.

Because these Gaussian representations can adapt to the shape of real-world objects more efficiently, the system requires far less memory than conventional approaches while still preserving detailed information about obstacles and free space.

The chip uses a mapping algorithm developed by the researchers called GMMap, which can generate accurate 3D maps from depth images in a single pass, eliminating the need to repeatedly process and store large image datasets.

“At any point in time, we only need to store a few pixels in memory, which significantly reduces the memory footprint our algorithm requires,” co-lead author Peter Zhi Xuan Li said.

Improving efficiency through hardware-software co-design

As robots move through an environment, they often observe the same object from multiple viewpoints, creating overlapping representations that can increase map size.

To address this, the researchers developed a technique that merges overlapping Gaussian representations directly, without revisiting the original image data. This further reduces memory requirements and power consumption.

The chip also keeps frequently used map data in small on-chip memory units located close to the processing hardware, reducing the need to access more energy-intensive external storage.

“By having a dedicated memory that just stores the objects you’ve seen in the previous few frames, you can access the data much more efficiently,” co-lead author Zih-Sing Fu said.

Potential uses beyond robotics

The researchers tested the chip using a range of existing 3D environments and live data streams from an iPhone camera. In these experiments, Gleanmer generated detailed maps in real time while consuming only about 2.5% of the power required by the best existing map-construction chips.

The team believes the technology could be useful not only for autonomous robots and drones but also for lightweight augmented reality headsets, particularly in applications such as medical training, repair work, and industrial assembly.

“We reduce the memory consumption by making sure the algorithm is efficient. Then we accelerate the workload that is performed by that efficient algorithm, so in the end, our chip is as efficient as possible,” Li said.

Researchers now plan to further improve the technology by bringing processing components closer to sensors and exploring additional applications, including AI systems that need to analyse complex engineering schematics.

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